Universally, there are product demands for electronics miniaturization, reduced power consumption, and higher performance. These demands increase the need for smaller, more efficient circuits for digital to analog and analog to digital converters. Particularly, this includes high performance, high gain amplifiers. Biomedical applications are one, nonlimiting, example.
High-gain amplifiers have difficulties driving large capacitor loads. They need increased bandwidth, higher slew rate, and hence larger power consumption. While there are established ways of dealing with this problem, they present disadvantages. Multiple gain stages may be used to relax the bandwidth requirement. Alternatively, buffer amplifiers can be inserted to decrease the capacitive loading of the main amplifier.
However, both methods increase the power consumption of the system. FIG. 1 displays a conventional comparator-based switched-capacitor (CBSC) circuit 100 to replace amplifiers requiring large static currents with comparators employing small static currents. It includes comparator 105, current sources 110 and 115, switches 120 and 125, and capacitor 130. However, this architecture suffers from overshoot error, caused by comparator delay. To correct this error, an additional “fine” phase is required. During this phase, a low current source is used to correct the error caused by the delay. This requires additional circuitry.
What is needed are techniques for driving large capacitor loads with high gain amplifiers that have low power consumption and simplified circuitry.